![]() Intel® PCM version 1.5 (and later) also supports Intel® Atom™ processors but counters like memory and Intel® QPI bandwidth and 元 Cache Misses will always show 0 because there is no 元 Cache in the Intel® Atom™ processor and no on-die memory controller or Intel® QPI links. Uncore: read bytes from memory controller(s), bytes written to memory controller(s), data traffic transferred by the Intel® QuickPath Interconnect links.Core: instructions retired, elapsed core clock ticks, core frequency including Intel® Turbo boost technology, L2 cache hits and misses, 元 cache misses and hits (including or excluding snoops). ![]() In total, the following metrics are supported: The uncore is the part of the processor that contains the integrated memory controller and the Intel® QuickPath Interconnect to the other processors and the I/O hub. In contrast to other existing frameworks like PAPI* and Linux* "perf" we support not only core but also uncore PMUs of Intel processors (including the recent Intel® Xeon® E7 processor series). We have implemented a basic set of routines with a high level interface that are callable from user C++ application and provide various CPU performance metrics in real-time. We concentrate on the advanced feature set available in the current Intel® Xeon® 5500, 5600, 7500, E5, E7 and Core i7 processor series. In order to obtain a more precise picture of CPU resource utilization we rely on the dynamic data obtained from the so-called performance monitoring units (PMU) implemented in Intel's processors. The good news is that Intel processors already provide the capability to monitor performance events inside processors. The bandwidth test "stream" already saturates the capacity of memory controller with fewer threads than there are cores available.Ībstraction Level for Performance Monitoring Units Ī different example is the CPU utilization for "memory throughput"-intensive workloads on multi-core systems. Then, the reported CPU utilization is 50% even though the application can use up to 70%-100% of the execution units. Details are explained in. However, HT-unaware end users get easily confused by the reported CPU utilization: Consider an application that runs a single thread on each physical core. ![]() ![]() ![]() Intel® HT technology is a great performance feature that can boost performance by up to 30%. The advances in computer architecture made this algorithm an unreliable metric because of introduction of multi core and multi CPU systems, multi-level caches, non-uniform memory, simultaneous multithreading (SMT), pipelining, out-of-order execution, etc.įigure 2: The complexity of a modern multi-processor, multi-core systemĪ prominent example is the non-linear CPU utilization on processors with Intel® Hyper-Threading Technology (Intel® HT Technology). For compute-bound workloads, the CPU utilization metric calculated this way predicted the remaining CPU capacity very well for architectures of 80ies that had much more uniform and predictable performance compared to modern systems. The current implementation of this metric (the number that the UNIX* "top" utility and the Windows* task manager report) shows the portion of time slots that the CPU scheduler in the OS could assign to execution of running programs or the OS itself the rest of the time is idle. When the CPU utilization does not tell you the utilization of the CPUĬPU utilization number obtained from operating system (OS) is a metric that has been used for many purposes like product sizing, compute capacity planning, job scheduling, and so on. ![]()
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